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undergraduate thesis
Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC
Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2016. urn:nbn:hr:200:400796
Štadler, Hrvoje
Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Software Engineering
Chair of Programming Languages and Systems

Institutional repository: Faculty of Electrical Engineering, Computer Science and Information Technology Osijek

Cite this document

Štadler, H. (2016). Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC (Undergraduate thesis). Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek. Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:400796

Štadler, Hrvoje. "Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2016. https://urn.nsk.hr/urn:nbn:hr:200:400796

Štadler, Hrvoje. "Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2016. https://urn.nsk.hr/urn:nbn:hr:200:400796

Štadler, H. (2016). 'Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC', Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 25 November 2024, https://urn.nsk.hr/urn:nbn:hr:200:400796

Štadler H. Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC [Undergraduate thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2016 [cited 2024 November 25] Available at: https://urn.nsk.hr/urn:nbn:hr:200:400796

H. Štadler, "Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC", Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2016. Available at: https://urn.nsk.hr/urn:nbn:hr:200:400796

Metadata
TitleIzrada modela sklopovlja računalne platforme upotrebom alata HWLOC
Title (english)Computer platform hardware modelling by HWLOC tool
AuthorHrvoje Štadler
MentorGoran Martinović (mentor)
MentorZdravko Krpić (mentor)
Committee memberGoran Martinović (predsjednik povjerenstva)
Committee memberMirko Kohler (član povjerenstva)
Committee memberZdravko Krpić (član povjerenstva)
GranterJosip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
(Department of Software Engineering)
(Chair of Programming Languages and Systems)
Osijek
Defense date and country2016-09-22, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Telecommunications and Informatics
Abstract
Tema završnog rada je „Izrada modela sklopovlja računalne platforme upotrebom alata HWLOC“. U izradi završnog rada korišteni su alati HWLOC, CPU-Z i AIDA64, a Lightshot i Paint su bili potrebni za uzimanje i uređivanje slika. U početku su programi testirani na Microsoft Windows operacijskom sustavu, a da bi se HWLOC mogao testirati sa svim mogućnostima bilo je potrebno upoznati se s radom na Linuxu i naredbama potrebnim za njegovo pravilno korištenje. Kako se bilo koji od ovih alata sa svojim mogućnostima testirao uzimale su se slike kao dokaz i prikaz rezultata. Kada su testiranja svih alata završena prikupljene podatke i slike bilo je potrebno objediniti u dokument i poštivati pritom pravila pisanja završnog rada.
Abstract (english)
The main goal of this thesis is „Making a hardware model of computer platform using HWLOC“. In the making of this paper I used tools: HWLOC, CPU-Z and AIDA64, while Lighshot and Paint were used to edit and save pictures. At the beginning, the tools were tested on Microsoft Windows operating system, but to get the best performances from HWLOC it was required to explore Linux and its commands. As the testings were made, pictures were taken as a proof of the results that were acquired. When the testings of all above mentioned tools were done, gathered data and pictures were summarized into one document, while the rules for making this paper were followed.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:200:400796
Study programmeTitle: Professional study programme of Electrical Engineering; specializations in: Power Engineering, Automation, Informatics
Course: Informatics
Study programme type: professional
Study level: undergraduate
Academic / professional title: stručni/a prvostupnik/prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike (stručni/a prvostupnik/prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike)
Type of resourceText
File originBorn digital
Access conditionsOpen access
Terms of useLicence In copyright icon
Created on2016-10-12 10:41:31