prikaz prve stranice dokumenta Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji
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master's thesis
Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2023. urn:nbn:hr:168:360328
Baća, Juraj
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

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Baća, J. (2023). Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:360328

Baća, Juraj. "Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2023. https://urn.nsk.hr/urn:nbn:hr:168:360328

Baća, Juraj. "Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2023. https://urn.nsk.hr/urn:nbn:hr:168:360328

Baća, J. (2023). 'Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 28 December 2024, https://urn.nsk.hr/urn:nbn:hr:168:360328

Baća J. Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2023 [cited 2024 December 28] Available at: https://urn.nsk.hr/urn:nbn:hr:168:360328

J. Baća, "Optimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2023. Available at: https://urn.nsk.hr/urn:nbn:hr:168:360328

Metadata
TitleOptimizacija dizajna silaznog DCDC pretvarača i mjerenja vođenih smetnji
Title (english)Optimization of synchronous buck converter and its conducted emissions
AuthorJuraj Baća
MentorAdrijan Barić (mentor)
Committee memberAdrijan Barić (predsjednik povjerenstva)
Committee memberTomislav Marković (član povjerenstva)
Committee memberTvrtko Mandić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2023-07-07, Croatia
Abstract
Integrirani sklop AP64502Q je 5-A, sinkroni silazni DC-DC pretvarač sa širokim rasponom ulaznog napona od 3,8 V do 40 V za primjenu u automobilskoj industriji. Karakteristika pretvarača je dizajn za smanjenu generaciju elektromagnetskih smetnji. Cilj diplomskog rada bio je proračunati silazni DC-DC pretvarač i pripadajući EMI filter, projektirati četveroslojnu tiskanu pločicu i izmjeriti vođene smetnje prema CISPR 25 standardu. Pri projektiranju tiskane pločice dodana je zaštita obrnutog polariteta te dinamički teret za mjerenje odziva na brze promjene tereta. Ulazni EMI filter optimiziran je pomoću 3D elektromagnetskih simulacija s realnim modelima pasivnih komponenti te su korelirana mjerenja i simulacije.
Abstract (english)
The AP64502Q integrated circuit is a 5-A, synchronous step-down DC-DC converter with a wide input voltage range from 3.8 V to 40 V for automotive applications. The characteristic of the converter is the design for reduced generation electromagnetic interference. The aim of the thesis was to calculate the step-down DC-DC converter and the associated EMI filter, design a four-layer printed circuit board and measure conducted interference according to the CISPR 25 standard. When designing the printed circuit board reverse polarity protection and dynamic load for measuring response to rapid load changes are added. The input EMI filter is optimized by means of 3D electromagnetic simulations with realistic models of passive components and the measurements are correlated with simulations.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:360328
Study programmeTitle: Electrical Engineering and Information Technology
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
Type of resourceText
File originBorn digital
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Created on2023-07-13 09:53:24