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master's thesis
Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2018. urn:nbn:hr:168:360983
Gabrić, Domagoj
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Gabrić, D. (2018). Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:360983

Gabrić, Domagoj. "Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2018. https://urn.nsk.hr/urn:nbn:hr:168:360983

Gabrić, Domagoj. "Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2018. https://urn.nsk.hr/urn:nbn:hr:168:360983

Gabrić, D. (2018). 'Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 04 July 2024, https://urn.nsk.hr/urn:nbn:hr:168:360983

Gabrić D. Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2018 [cited 2024 July 04] Available at: https://urn.nsk.hr/urn:nbn:hr:168:360983

D. Gabrić, "Sklop za ubrzanje algoritma kodiranja videa za računala visokih performanci", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2018. Available at: https://urn.nsk.hr/urn:nbn:hr:168:360983

Metadata
TitleSklop za ubrzanje algoritma kodiranja videa za računala visokih performanci
Title (english)Hardware accelerator for high performance computer based video coding algorithm
AuthorDomagoj Gabrić
MentorMario Kovač (mentor)
Committee memberMario Kovač (predsjednik povjerenstva)
Committee memberJosip Knezović (član povjerenstva)
Committee memberDaniel Hofman (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2018-07-03, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
Porast popularnosti internetskih video usluga dovodi do značajnog porasta udjela video prometa u Internet prometu. Jedan od načina za povećanje performanci sustava za rad s video uslugama je razvoj sklopa za ubrzanje. U ovom radu računalo je povezano s FPGA sklopom korištenjem PCI Express sabirnice. Analiziran je HEVC koder. U programabilnoj logici ostvaren je sklop za izvođenje dijela HEVC kodera. Razvijeno je više verzija sklopa i ispitane su različite arhitekture sustava. Kodiran je video pomoću ostvarenog FPGA sklopa i napravljena je usporedba vremena izvođenja.
Abstract (english)
Rise in popularity of the internet video services brings us to rise in the internet video traffic. One possibility for enhancing performances of systems for running video services is developing an accelerator. In this thesis personal computer is connected with FPGA logic using the PCI Express bus. HEVC encoder is analyzed. Hardware accelerator for part of the HEVC encoder algorithm is implemented. Multiple versions of accelerator are developed and different architectures are tested. Sample video is encoded using implemented FPGA accelerator and running time comparison is made.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:360983
Study programmeTitle: Computing
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
Access conditionsClosed access
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Created on2019-03-13 20:20:33