prikaz prve stranice dokumenta FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila
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master's thesis
FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. urn:nbn:hr:168:076939
Laznibat, Ivan
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Laznibat, I. (2017). FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, Ivan. "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, Ivan. "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, I. (2017). 'FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 06 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat I. FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2017 [cited 2024 November 06] Available at: https://urn.nsk.hr/urn:nbn:hr:168:076939

I. Laznibat, "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2017. Available at: https://urn.nsk.hr/urn:nbn:hr:168:076939

Metadata
TitleFPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila
Title (english)FPGA Implementation of Multiplierless Digital Down Converter
AuthorIvan Laznibat
MentorDavor Petrinović (mentor)
Committee memberDavor Petrinović (predsjednik povjerenstva)
Committee memberMladen Vučić (član povjerenstva)
Committee memberGoran Molnar (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2017-07-07, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Abstract
U ovom radu opisana je kratka teoretska pozadina o sustavu za digitalnu konverziju frekvencije uzorkovanja (eng. Digital down converter, DDC). Sustav se sastoji od kaskade: polinomijalno izoštrenog CIC decimatora (SCIC), SCIC kompenzatora i filtra kanala. Najčešća primjena DDC sustava je u programski definiranom radiju. Napravljen je model sustava u Matlabu te su uspoređena dva ekvivalentna primjera DDC-a: s i bez polinomijalnog izoštravanja. Napravljen je RTL model u VHDL i odgovarajuće ispitno okruženje gdje je model ispitan.
Abstract (english)
In this paper it is described a short theoretical background of the Digital Down Converter (DDC) system. The system consists of a cascade of: polynomial sharpened CIC decimator (SCIC), SCIC compensator and channel filter. The most common application of DDC is in program-defined radio. A model was developed in Matlab and two equivalent examples of DDC were compared: with and without polynomial sharpening. An RTL model was created in VHDL. Also test environment was created where the model was tested.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:076939
Study programmeTitle: Electrical Engineering and Information Technology
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
Type of resourceText
File originBorn digital
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Created on2019-03-13 22:16:03