prikaz prve stranice dokumenta Xillybus razvojni sustav
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undergraduate thesis
Xillybus razvojni sustav
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2014. urn:nbn:hr:168:357114
Vojić, Marko
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

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Vojić, M. (2014). Xillybus razvojni sustav (Undergraduate thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:357114

Vojić, Marko. "Xillybus razvojni sustav." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2014. https://urn.nsk.hr/urn:nbn:hr:168:357114

Vojić, Marko. "Xillybus razvojni sustav." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2014. https://urn.nsk.hr/urn:nbn:hr:168:357114

Vojić, M. (2014). 'Xillybus razvojni sustav', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 28 December 2024, https://urn.nsk.hr/urn:nbn:hr:168:357114

Vojić M. Xillybus razvojni sustav [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2014 [cited 2024 December 28] Available at: https://urn.nsk.hr/urn:nbn:hr:168:357114

M. Vojić, "Xillybus razvojni sustav", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2014. Available at: https://urn.nsk.hr/urn:nbn:hr:168:357114

Metadata
TitleXillybus razvojni sustav
Title (english)Xillybus development system
AuthorMarko Vojić
MentorHrvoje Mlinarić (mentor)
Committee memberHrvoje Mlinarić (predsjednik povjerenstva)
Committee memberJosip Knezović (član povjerenstva)
Committee memberDaniel Hofman (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2014-07-14, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
Proučiti i opisati osnovnu funkcionalnost Xillybus razvojnog sustava i njegovu primjenu na Zynq SoC sklopovima koji pokreću Linux operacijski sustav. Korištenjem HDL jezika kreirati komponente koje će se preko Xillybus razvojnog sustava povezati s operacijskim sustavom Linux. Opisati postupak kreiranje novih komponenti i postupak izrade programske podrške za komunikaciju između novokreiranih komponenti i aplikacija koje se izvode pod operacijskim sustavom Linux. Izmjeriti brzinu komunikacije između kreirane komponente i aplikacije koje se izvršava u korisničkom dijelu operacijskog sustava Linux.
Abstract (english)
Examine and describe the basic functionality of the Xillybus development system and its use on the Zynq SoC boards which run Linux operating system. Use HDL language to create components that will be connected with Linux operating system over Xillybus development system. Describe the process of creating new components and software for communication between newly created components and applications that run under the Linux operating system. Measure the speed of communication between the designed components and applications that are executed in the user part of the Linux operating system.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:357114
Study programmeTitle: Computing
Study programme type: university
Study level: undergraduate
Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
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Created on2018-02-06 07:32:42