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master's thesis
Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. urn:nbn:hr:168:234455
Matić, Bruno
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

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Matić, B. (2017). Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:234455

Matić, Bruno. "Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:234455

Matić, Bruno. "Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:234455

Matić, B. (2017). 'Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 13 January 2025, https://urn.nsk.hr/urn:nbn:hr:168:234455

Matić B. Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2017 [cited 2025 January 13] Available at: https://urn.nsk.hr/urn:nbn:hr:168:234455

B. Matić, "Optimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2017. Available at: https://urn.nsk.hr/urn:nbn:hr:168:234455

Metadata
TitleOptimiranje video-algoritama korištenjem naredaba ARM NEON i izvedbom u sklopovlju FPGA
Title (english)Video Algorithms Optimization Using ARM NEON Instructions and FPGA Implementation
AuthorBruno Matić
MentorMario Kovač (mentor)
Committee memberMario Kovač (predsjednik povjerenstva)
Committee memberDanko Basch (član povjerenstva)
Committee memberMartin Žagar (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2017-07-03, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
U radu je proučen algoritam 2D DCT-a i algoritam interpolacije za normu H.265. Uz pomoć PetaLinux i Vivado alata razvijene su dvije platforme za razvoj i ispitivanje zasnovan na Linux operativnom sustavu. Algoritam 2D DCT-a je optimiziran za što brže izvođenje na Zynq SoC-u kroz tri faze: optimiziranje (redizajniranje) samog algoritma, izvedba redizajniranog algoritma u C programskom jeziku i direktno u ARM strojnom kôdu, te konačna izvedba unutar FPGA sklopovlja putem SDSoC alata. Slična metoda optimizacije se predlaže i za algoritam interpolacije. Konačno optimalno rješenje jest hibridni sustav koji dio algoritma izvodi na procesoru ARM Cortex-A9 naredbama NEON, a dio akceleratorskim jezgrama unutar FPGA sklopovlja.
Abstract (english)
In this master thesis H.265 standard 2D DCT algorithm and interpolation algorithm were studied. By using PetaLinux and Vivado toolset two Linux based development and testing platforms were developed. 2D DCT algorithm was optimized for speed on Zynq SoC in three phases: optimizing (redesigning) the algorithm, implementation of redesigned algorithm in C programming language and directly in ARM assembly code and finally by implementing the algorithm in FPGA fabric trough SDSoC tool. Similar method of optimization is proposed for interpolation algorithm. Final optimal solution is a hybrid system where a part of the algorithm is executed on ARM Cortex-A9 processor using NEON instructions and the second part of the algorithm is executed on accelerator cores in FPGA fabric.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:234455
Study programmeTitle: Computing
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
Access conditionsClosed access
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Created on2019-03-13 22:50:08