prikaz prve stranice dokumenta FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi
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master's thesis
FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2016. urn:nbn:hr:168:710701
Benc, Antonio
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

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Benc, A. (2016). FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, Antonio. "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2016. https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, Antonio. "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2016. https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, A. (2016). 'FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 29 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc A. FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2016 [cited 2024 November 29] Available at: https://urn.nsk.hr/urn:nbn:hr:168:710701

A. Benc, "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2016. Available at: https://urn.nsk.hr/urn:nbn:hr:168:710701

Metadata
TitleFPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi
Title (english)FPGA implementation of variable delay filters based on Farrow structure
AuthorAntonio Benc
MentorMladen Vučić (mentor)
Committee memberMladen Vučić (predsjednik povjerenstva)
Committee memberDavor Petrinović (član povjerenstva)
Committee memberGoran Molnar (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2016-07-06, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
U ovom radu opisani su filtri s varijabilnim kašnjenjem i razvijen je model filtra s varijabilnim kašnjenjem koji koristi Farrow strukturu te je napravljena njegova implementacija na razvojnom sustavu Zedboard. Model podržava maksimalan red filtra 10. U svrhu usporedbe razvijen je i model filtra s varijabilnim kašnjenjem koji koristi CIC interpolator. Testiranje nad nekoliko ispitnih signala pokazalo je da Farrow filtar daje rezultate bliže idealnima i koristi manje odsječaka programabilne logike, no za razliku od filtra sa CIC interpolatorom koristi DSP ćelije.
Abstract (english)
In this thesis variable delay filters are described and a model of variable delay filter which uses Farrow structure is developed in VHDL and implemented on ZedBoard development board. The model supports maximum filter order of 10. Another variable delay filter which uses CIC interpolator is developed for comparison. The results show that the Farrow filter gives the results closer to ideal than the filter with CIC interpolator and uses less programmable logic slices. However, the filter with CIC interpolator does not use DSP slices.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:710701
Study programmeTitle: Information and Communication Technology
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka informacijske i komunikacijske tehnologije (magistar/magistra inženjer/inženjerka informacijske i komunikacijske tehnologije)
Type of resourceText
File originBorn digital
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Created on2018-02-06 07:50:23