prikaz prve stranice dokumenta Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza
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scientific master's theses
Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2000. urn:nbn:hr:168:822400
Ercegović, Boris
University of Zagreb
Faculty of Electrical Engineering and Computing
Department of Control and Computer Engineering

Institutional repository: FER Repository

Cite this document

Ercegović, B. (2000). Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza (Scientific master's theses). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:822400

Ercegović, Boris. "Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2000. https://urn.nsk.hr/urn:nbn:hr:168:822400

Ercegović, Boris. "Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2000. https://urn.nsk.hr/urn:nbn:hr:168:822400

Ercegović, B. (2000). 'Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza', Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 16 August 2024, https://urn.nsk.hr/urn:nbn:hr:168:822400

Ercegović B. Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza [Scientific master's theses]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2000 [cited 2024 August 16] Available at: https://urn.nsk.hr/urn:nbn:hr:168:822400

B. Ercegović, "Analiza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza", Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2000. Available at: https://urn.nsk.hr/urn:nbn:hr:168:822400

Metadata
TitleAnaliza učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza
AuthorBoris Ercegović
MentorIvan Husar (mentor)
Committee memberZvonko Benčić (član povjerenstva)
Committee memberIvan Husar (član povjerenstva)
Committee memberJuraj Božičević (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
(Department of Control and Computer Engineering)
Zagreb
Defense date and country2000-07-06, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Process Computing
Universal decimal classification
(UDC)		004 - Computer science and technology. Computing. Data processing
Abstract
U radu je analizirana učinkovitost mikroprocesorskih uređaja za osiguranje cestovnih prijelaza. Budući da postojeći relejski signalno-sigurnosni uređaji u dovoljnoj mjeri ispunjavaju zahtjeve za učinkovitošću, a uz prisutnu dvojbu o sigurnosti i učinkovitosti mikroprocesorskih uređaja u željezničkom prometu, nametnula se potreba analize učinkovitosti prve instalirane skupine mikroprocesorskih uređaja za osiguranje cestovnih prijelaza u našoj zemlji s postojećim relejskim uređajima. Dan je osvrt na metode povećanja učinkovitosti rada mikroprocesorskog uređaja, mikroprocesore, programske jezike, računalske mreže, kvalitetu proizvodnje i prijedlog tehnologije održavanja. Opisana je struktura i princip rada mikroprocesorskog uređaja za osiguranje cestovnih prijelaza. Nastavak donosi teoretsku postavku učinkovitosti, podjelu nepravilnosti funkcije rada uređaja za osiguranje cestovnih prijelaza, te statistički prikaz nepravilnosti funkcije rada u ovisnosti o vremenu, mjestu i posljedicama nastanka, a na temelju toga usporedba učinkovitosti mikroprocesorskog i relejskog uređaja. Na kraju su, na temelju statističkih podataka, prikazani prijedlozi povećanja učinkovitosti mikroprocesorskog uređaja za osiguranje cestovnih prijelaza, koji bi se trebali provesti u fazama izrade specifikacije zahtjeva na funkcije rada, projektiranju ugradnje, puštanju u rad i radu takvih uređaja.
Abstract (english)
This paper analyzes the efficiency of the microprocessor Level Crossing Equipment. As the existing relay-based signalling and safety devices meet the criteria of efficiency in a satisfactory way, and taking into account certain suspicion with regard to the fail-safety and efficiency of the microprocessor devices in railway traffic, there has been a need to analyze the efficiency of the first installed group of the microprocessor Level Crossing Equipment in our country and to compare then with the existing relays. The paper considers the methods of increasing the efficiency of microprocessor devices, the microprocessor itself, programming languages, computer networks, the quality of production and a proposal of maintenance technology. It describes the structure and principle of work of the microprocessor Level Crossing Equipment. The paper continues with the theoretical proposition of efficiency, the distribution of malfunctions depending on time, place and consequences of their occurrence. Accordingly, there is a comparison of the efficiency of the microprocessor device and the relay-based device. Finally, on the basis of statistical data, the proposals are given for the increase of efficiency of the microprocessor Level Crossing Equipment, which are to be performed in the stages of defining the function requirements, installation design, putting into operation and functioning of such devices.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:822400
Study programmeTitle: Postgraduate master programe in computing
Study programme type: university
Study level: postgraduate
Academic / professional title: magistar inženjer računarstva (magistar inženjer računarstva)
Type of resourceText
File originBorn digital
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Created on2019-04-04 08:33:24