prikaz prve stranice dokumenta Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje
No public access
scientific master's theses
Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2004. urn:nbn:hr:168:374598
Koričić, Marko
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Koričić, M. (2004). Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje (Scientific master's theses). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:374598

Koričić, Marko. "Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2004. https://urn.nsk.hr/urn:nbn:hr:168:374598

Koričić, Marko. "Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2004. https://urn.nsk.hr/urn:nbn:hr:168:374598

Koričić, M. (2004). 'Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje', Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 27 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:374598

Koričić M. Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje [Scientific master's theses]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2004 [cited 2024 November 27] Available at: https://urn.nsk.hr/urn:nbn:hr:168:374598

M. Koričić, "Bipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje", Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2004. Available at: https://urn.nsk.hr/urn:nbn:hr:168:374598

Metadata
TitleBipolarni VLSI/ULSI tranzistori s horizontalnim tokom struje
AuthorMarko Koričić
MentorPetar Biljanović (mentor)
Committee memberBožidar Vojnović (predsjednik povjerenstva)
Committee memberPetar Biljanović (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2004, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Universal decimal classification
(UDC)		621.3 - Electrical engineering
Abstract
U radu je prikazan pregled postojećih bipolarnih tehnologija. Opisana su ograničenja vertikalnih i lateralnih bipolarnih tranzistora. Zbog smanjenog volumena parazitnih dijelova, lateralni tranzistori imaju male iznose parazitnih kapaciteta i otpora što ih čini pogodnima za primjene gdje se zahtijeva mala disipacija snage. Nadalje, pogodni su za integraciju u BiCMOS proces. Ispitane su mogućnosti skaliranja lateralnih tranzistora izvedenih u SOI tehnologiji. Izvedene su simulacije električkih karakteristika za strukturu s baznim kontaktom na vrhu i za strukturu s bočno izvedenim kontaktom baze. Pokazano je da su glavna ograničenja postojećih lateralnih tranzistora vezana uz procesiranje intrinsične baze. Tehnološki proces za dobivanje tranzistora s horizontalnim tokom struje (HCBT) omogućava dobivanje optimalnih profila primjesa u intrinsičnom tranzistoru. Pri tome je volumen parazitnih dijelova znatno smanjen u odnosu na vertikalne tranzistore. Ispitane su mogućnosti skaliranja te optimiranja profila primjesa za HCBT strukturu. Pokazano je da su karakteristike HCBT-a ograničene litografijom te da je strukturu potrebno skalirati. HCBT izveden u naprednijoj tehnologiji ima visok iznos frekvencije jediničnog pojačanja (fT) te probojnog napona u spoju zajedničkog emitera (BVCEO). To je posljedica dijeljenja naboja između akceptora iz intrinsične i ekstrinsične baze. Analiziran je efekt dijeljenja naboja te je izvedena optimizacija geometrijskih parametara ekstrinsične baze za bolje rješenje kompromisa između fT i BVCEO. Pokazano je da se BVCEO može povećati za 23.6 %, a da se pri tome fT smanji samo 5.7 %.
Abstract (english)
Short overview of current bipolar technologies is given. The limitations of the vertical and lateral devices are presented. Due to the reduced parasitic transistor volume, lateral transistors observe small parasitic capacitances and resistances, which make them attractive for low-power applications. Furthermore, they are suitable for BiCMOS integration. Scaling properties of SOI lateral transistors are investigated. Electrical characteristics simulations for structure with base contact on top and laterally contacted structure are performed. It is shown that lateral devices are limited by intrinsic base processing. Horizontal Current Bipolar Transistor (HCBT) process results in an optimal intrinsic doping profile. Compared to vertical current devices, volume of parasitic regions is reduced. HCBT scaling properties and optimization of the doping profile are examined. It is shown that the electrical characteristics are limited by lithography. Therefore HCBT should be scaled. HCBT processed in an advanced technology has high cut-off frequency (fT) and high common emitter breakdown voltage (BVCEO). This is due to charge sharing between intrinsic and extrinsic base acceptors. Charge sharing effect is analyzed and optimization of extrinsic base geometrical parameters for better fT vs. BVCEO trade-off solution is performed. It is shown that BVCEO can be relatively increased by 23.6 % while fT is decreased by only 5.7 %.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:374598
Study programmeTitle: Postgraduate master programme in electrical engineering
Study programme type: university
Study level: postgraduate
Academic / professional title: Magistar znanosti elektrotehnike (Magistar znanosti elektrotehnike)
Catalog URLhttps://lib.fer.hr:8443/cgi-bin/koha/catalogue/detail.pl?biblionumber=29365
Type of resourceText
Extent109 str.; 30 cm
File originBorn digital
Access conditionsClosed access
Terms of useLicence In copyright icon
Created on2020-03-06 13:15:35