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Scientific paper - Original scientific paper
Highly parallel GPU accelerator for HEVC transform and quantization
In: Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence. / Ruidan, Su (Ed.). Washington, USA: SPIE, 2020. pp. 81-86. https://doi.org/10.1117/12.2581228
Čobrnić, Mate; Duspara, Alen; Dragić, Leon; Piljić, Igor; Kovač, Mario

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Čobrnić, M., Duspara, A., Dragić, L., Piljić, I. & Kovač, M. (2020). Highly parallel GPU accelerator for HEVC transform and quantization. In S. Ruidan, (Ed.), Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence (pp. 81-86). Washington, USA: SPIE. doi: 10.1117/12.2581228

Čobrnić, Mate, et al. "Highly parallel GPU accelerator for HEVC transform and quantization." Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, edited by Su Ruidan, SPIE, 2020, pp. 81-86. https://urn.nsk.hr/urn:nbn:hr:168:263496

Čobrnić, Mate, Alen Duspara, Leon Dragić, Igor Piljić and Mario Kovač. "Highly parallel GPU accelerator for HEVC transform and quantization." In Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, 81-86. Washington, USA: SPIE, 2020. Accessed 2024 December 26. https://urn.nsk.hr/urn:nbn:hr:168:263496

Čobrnić, M., et al. (2020) 'Highly parallel GPU accelerator for HEVC transform and quantization', in Ruidan, S. (ed.), Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, SPIE, Washington, USA, pp. 81-86. Available at: https://urn.nsk.hr/urn:nbn:hr:168:263496 (Accessed 26 December 2024)

Čobrnić M, Duspara A, Dragić L, Piljić I, Kovač M. Highly parallel GPU accelerator for HEVC transform and quantization. In: S. Ruidan, ed. Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence. Washington, USA: SPIE; 2020. Pp. 81-86. [cited 2024 December 26] Available at: https://urn.nsk.hr/urn:nbn:hr:168:263496

M. Čobrnić, A. Duspara, L. Dragić, I. Piljić and M. Kovač, "Highly parallel GPU accelerator for HEVC transform and quantization", Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, S. Ruidan, Ed. Washington, USA: SPIE, 2020. [Online] Available at: https://urn.nsk.hr/urn:nbn:hr:168:263496 [Accessed: 26 December 2024]

Metadata
Title (english)Highly parallel GPU accelerator for HEVC transform and quantization
AuthorMate Čobrnić https://orcid.org/0000-0002-1422-0392
AuthorAlen Duspara
AuthorLeon Dragić
AuthorIgor Piljić https://orcid.org/0000-0003-2345-0322
AuthorMario Kovač
EditorSu Ruidan
Author's institutionUniversity of Zagreb
Faculty of Electrical Engineering and Computing
(Department of Control and Computer Engineering)
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Architecture of Computer Systems
Abstract (english)
When analysing Internet traffic today it can be found that digital video content prevails. Its domination will continue to grow in the upcoming years and reach 82% of all traffic by 2021. If converted to Internet video minutes per second, this equals about one million video minutes per second. Providing and supporting improved compression capability is therefore expected from video processing devices. This will relieve the pressure on storage systems and communication networks while creating preconditions for further development of video services. Transform and quantization is one of the most compute-intensive parts of modern hybrid video coding systems where coding algorithm itself is commonly standardized. High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard which achieves high compression efficiency at the cost of high computational complexity. In this paper we present highly parallel GPU accelerator for HEVC transform and quantization which targets most common heterogeneous computing CPU+GPU system. The accelerator is implemented using CUDA programming model. All the relevant state-of-the-art techniques related to kernel vectorization, shared memory optimization and overlapping data transfers with computation were investigated, customized and carefully combined to obtain a performance efficient solution across all applicable transform sizes. The proposed solution is compared against reference implementation which uses NVIDIA cuBLAS library to perform the same work. Obtained speedup factors for DCI 4K frame are 2.46 times for largest transform size and 130.17 times for smallest transform size what revealed substantial performance gap of this library when targeting GPU of the Kepler architecture. Achieved processing time of frame transform and quantization are up to 4.82 ms.
Keywords (english)
Languageenglish
Publication typeScientific paper - Original scientific paper
Publication statusPublished
Peer reviewPeer review - international
Publication versionPublished version
Publication titleProc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence
Numberingvol. 11584, pp. 81-86
ISBN9781510639973
e-ISSN1996-756X
DOIhttps://doi.org/10.1117/12.2581228
URN:NBNurn:nbn:hr:168:263496
Publication2020-11-10
ProjectNumber: 761349
Title (croatian): TEchnology TRAnsfer via Multinational Application eXperiments
Acronym: TETRAMAX
Jurisdiction: eu
Funding stream: H2020
ConferenceTitle: Third International Conference on Image, Video Processing and Artificial Intelligence, 2020, Shanghai, China
Location: Shangai, China
Organizer: Shanghai Advanced Research Institute, Chinese Academy of Sciences
Start date: 2020-08-21
End date: 2020-08-23
Assembly type: Lecture
Document URLhttps://www.spiedigitallibrary.org/conference-proceedings-of-spie/11584/2581228/Highly-parallel-GPU-accelerator-for-HEVC-transform-and-quantization/10.1117/12.2581228.short
Type of resourceText
PublisherSPIE
Publishing placeWashington, USA
Access conditionsOpen access
Terms of useLicence In copyright icon
Public noteThe work in this paper was partially financed by the MEEP project that has received funding from the European High- Performance Computing Joint Undertaking (JU) under grant agreement No 946002 and by the TETRAMAX project that has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement number 761349.
Created on2020-12-08 08:36:28