prikaz prve stranice dokumenta Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke
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master's thesis
Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. urn:nbn:hr:168:206925
Jerković, Nikola
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

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Jerković, N. (2021). Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:206925

Jerković, Nikola. "Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. https://urn.nsk.hr/urn:nbn:hr:168:206925

Jerković, Nikola. "Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. https://urn.nsk.hr/urn:nbn:hr:168:206925

Jerković, N. (2021). 'Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 04 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:206925

Jerković N. Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2021 [cited 2024 November 04] Available at: https://urn.nsk.hr/urn:nbn:hr:168:206925

N. Jerković, "Primjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2021. Available at: https://urn.nsk.hr/urn:nbn:hr:168:206925

Metadata
TitlePrimjena FPGA programabilne logike za ubrzanje rada neuronske mreže za prepoznavanje gesti ruke
Title (english)Application of FPGA programmable logic to accelerate neural network operation for hand gesture recognition
AuthorNikola Jerković
MentorZdenko Kovačić (mentor)
Committee memberZdenko Kovačić (predsjednik povjerenstva)
Committee memberStjepan Bogdan (član povjerenstva)
Committee memberMatko Orsag (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2021-02-19, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
U radu su obrađene mogućnosti implementacije duboke neuronske mreže na Xilinx edukacijskoj platformi PYNQ Z1. Prolazi se kroz načine rada različitih rješenja, njihove prednosti, mane, načine postavljanja na platformu i poteškoće koje dolaze s tim. Krajnji rezultati su dijelom dobiveni eksperimentom, dijelom teoretski te se uspoređuju s alternativnom platformom nVidia Jetson TX2 koja umjesto FPGA sklopa koristi nVidia GPU s CUDA akceleracijom. Jetson TX2 se za svoju cijenu pokazao drastično jačim, konzistentniji u performansama te daleko lakši za razvoj i eksperimentaciju s puno širom podrškom.
Abstract (english)
In this work we look at the possible implementations of deep neural networks on Xilinx's educational platform, the PYNQ Z1. We go through the way different solutions work, their advantages and disadvantages, setup procedures and the difficulties that come with them. The end results are part eksperiment, part theory and are compared to an alterntative platform, the nVidia Jetson TX2 which uses an nVidia GPU with CUDA acceleration instead of an FPGA circuit. The Jetson TX2 proved to be drastically more powerful, consistent in performance and far easier to develop and experiment with while alos having far better support.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:206925
Study programmeTitle: Computing
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
Access conditionsClosed access
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Created on2023-01-13 10:06:54