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master's thesis
Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. urn:nbn:hr:168:621132
Vuglec, Josip
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Vuglec, J. (2020). Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:621132

Vuglec, Josip. "Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:621132

Vuglec, Josip. "Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:621132

Vuglec, J. (2020). 'Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 05 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:621132

Vuglec J. Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2020 [cited 2024 November 05] Available at: https://urn.nsk.hr/urn:nbn:hr:168:621132

J. Vuglec, "Sklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2020. Available at: https://urn.nsk.hr/urn:nbn:hr:168:621132

Metadata
TitleSklopovska jezgra za upravljanje individualno adresabilnih svjetlećih dioda
Title (english)IP core for control of individually addressable LEDs
AuthorJosip Vuglec
MentorHrvoje Mlinarić (mentor)
Committee memberHrvoje Mlinarić (predsjednik povjerenstva)
Committee memberJosip Knezović (član povjerenstva)
Committee memberDaniel Hofman (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2020-09-23, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
U današnje vrijeme se na tržištu individualno adresabinih svijetlećih dioda može naći desetak adresabilnih svijetlećih dioda različitih karakteristika, kao npr. svijetleće diode APA107, HD107S, WS2812/WS2812B, WS2801, WS2813. Namjena im je raznolika, koriste se za vanjsku i unutarnju upotrebu te za dekorativno osvijetljenje i drugo. Upravljanje datotečnog puta kod pojedinih je putem signala takta, dok je kod drugih bitno koliko je dugo na danom priključku visoki, a koliko dugo niski napon. U ovome radu korištene su individualno adresabilne svijetleće diode WS2812 koje su upravljane visokim i niskim razinama napona unaprijed definiranim vremenima trajanja. Kao sklopovlje kojim se upravlja individualno adresabilnim svijetlećim diodama WS2812 odabrana je razvojna pločica Xilinx MPSOC Zynq UltraScale+ ZCU104 koja se sastoji od sklopovlja FPGA i procesora te popratnom periferijom. Teoretske pretpostavke odziva i mogućnosti prikazivanja video zapisa na ekranu izrađenom pomoću individualno adresabilnih svijetlećih dioda WS2812 bile su da moguće ostvariti prikazivanje 30 i 60 sličica po sekundi za 240 WS2812 individualno adresabilnih svijetlećih dioda prema specifikacijama proizvođača. Teoretski rezultati su uspoređeni s rezultatima dobivenima u mjerenjima koji su pokazali da deformacije slike nisu uočene u paralelnom datotečnom putu niti na učitavanju 30 niti 60 sličica u sekundi, dok u serijskom datotečnom putu deformacije slike nisu uočene pri učitavanju 30 sličica u sekundi, a pri učitavanju 60 sličica u sekundi jesu.
Abstract (english)
Nowadays, a dozen addressable LEDs with different characteristics can be found on the market of individually addressable LEDs, such as LEDs APA107, HD107S, WS2812/WS2812B, WS2801, WS2813. Their purpose is various, they are used for outdoor and indoor use, as well as for decorative lighting and more. In some cases, data stream is controlled via clock signal, while in others it is important how long the voltage is high on a given port and how long it is low. In this work, individually addressable LEDs WS2812 were used, which are controlled by high and low voltage levels with predefined durations. The Xilinx MPSoC Zynq UltraScale + ZCU104 development board, which consists of an FPGA and a processor and the peripherals, was selected as the hardware that controls the individually addressable WS2812 LEDs. Theoretical response assumptions and the ability to display video on a screen made using individually addressable WS2812 LEDs were that it was possible to display 30 and 60 frames per second for 240 WS2812 individually addressable LEDs according to the manufacturer's specifications. Theoretical results were compared with the results obtained in measurements that showed that image distortions were not observed in the parallel data stream on either 30 or 60 frames per second, while in the serial data stream image distortions were not observed when loading 30 frames per second and when loading 60 frames per second were.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:621132
Study programmeTitle: Computing
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
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Created on2023-01-13 10:52:54