The phase frequency detector and the charge pump are the basic blocks of the frequency synthesizers that are mostly used in the telecommunications devices. A frequency synthesizer is a circuit that generates a specific frequency band from a single reference frequency that is commonly brought from a stable crystal oscillator. The circuits are designed for a 2 GHz fractional frequency synthesizer. A phase frequency detector is a digital circuit that compares the phases and the frequencies of the input signals and at the output gives a pulses whose width depends on the phase difference of the input signals. The output signals of the phase frequency detector are used to control the charge pumps which regulates the control voltage in the low-pass filter at their output. Depending of the amount of control voltage, a voltage-controlled oscillator generates a signal of a certain radio frequency. To achieve high spectral purity and low phase noise of the signal at the output, a PLL architecture with two parallel loops was used. The fine tuning loop determines the stability and has a narrow tuning frequency range while the coarse tuning loop does not affect the stability and has a wide tuning frequency range. A nonlinearity of the phase frequency and the charge pump due to which the quantization noise of the sigma delta modulator is folded down to low frequencies was analysed. In order to reduce this nonlinearity, a DC offset is introduced into the charge pump. The phase noise generated by the charge pump for the fine tuning the frequency is analyzed. The charge pump for the coarse tuning slightly contributes to the total noise due to the use of a large capacitor at its output. In order to filter quantization noise of the sigma delta modulator, a third-order low-pass filter was designed. The circuits were designed in Cadence Virtuoso software tool using 250 nm BiCMOS technology from the IHP institute.