Jakovac, S. (2020). Izvedba akceleratora za obradu slika za processor RISC-V (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:387175
Jakovac, Stjepan. "Izvedba akceleratora za obradu slika za processor RISC-V." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:387175
Jakovac, Stjepan. "Izvedba akceleratora za obradu slika za processor RISC-V." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:387175
Jakovac, S. (2020). 'Izvedba akceleratora za obradu slika za processor RISC-V', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 26 August 2024, https://urn.nsk.hr/urn:nbn:hr:168:387175
Jakovac S. Izvedba akceleratora za obradu slika za processor RISC-V [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2020 [cited 2024 August 26] Available at: https://urn.nsk.hr/urn:nbn:hr:168:387175
S. Jakovac, "Izvedba akceleratora za obradu slika za processor RISC-V", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2020. Available at: https://urn.nsk.hr/urn:nbn:hr:168:387175