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master's thesis
Funkcionalna verifikacija SPI protokola
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. urn:nbn:hr:168:607636
Levak, Lovro
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Levak, L. (2021). Funkcionalna verifikacija SPI protokola (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:607636

Levak, Lovro. "Funkcionalna verifikacija SPI protokola." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. https://urn.nsk.hr/urn:nbn:hr:168:607636

Levak, Lovro. "Funkcionalna verifikacija SPI protokola." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2021. https://urn.nsk.hr/urn:nbn:hr:168:607636

Levak, L. (2021). 'Funkcionalna verifikacija SPI protokola', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 16 July 2024, https://urn.nsk.hr/urn:nbn:hr:168:607636

Levak L. Funkcionalna verifikacija SPI protokola [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2021 [cited 2024 July 16] Available at: https://urn.nsk.hr/urn:nbn:hr:168:607636

L. Levak, "Funkcionalna verifikacija SPI protokola", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2021. Available at: https://urn.nsk.hr/urn:nbn:hr:168:607636

Metadata
TitleFunkcionalna verifikacija SPI protokola
Title (english)Functional Verification of the SPI Protocol
AuthorLovro Levak
MentorDražen Jurišić (mentor)
Committee memberDražen Jurišić (predsjednik povjerenstva)
Committee memberMladen Vučić (član povjerenstva)
Committee memberGoran Molnar (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2021-06-30, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Abstract
U ovom radu razvijena je UVM Verifikacijska komponenta (engl. UVM Verification Component) s ciljem funkionalne verifikacije SPI protokola. Temeljena je na Univerzalnoj Verifikacijskoj Metodologiji (engl. Universal Verification Methodology), koja je de-facto standard u verifikaciji digitalne logike današnjice, pri čemu se koristi pristup slučajno generirane pobude, te egzaktnog praćenja rezultata verifikacije. S ciljem ubrzanja razvoja verifikacijske komponente, korišten je UVMF (engl. UVM Framework). UVMF sadrži klase koje nasljeđuju UVM bazne klase, skripte za generiranje koda, dokumentaciju i primjere. Skripte za opis UVM komponenti napisane se u YAML-u (engl. YAML Ain't Markup Language). YAML omogućuje visoku razinu apstrakcije, pa je dobra metoda za povezivanje UVM komponenti. Verifikacijski plan bio je uspoređivati ulaze s izlazima iz komponete. Ako su oni jednaki, funkcionalnost SPI protokola bila bi potvrđena. UVC podržava sve SPI načine rada, kao i skup parametara poput duljine okvira podataka i broja transakcija. Razvijena komponenta sadrži i upravljač i izvršilac. Naposlijetku, testovi su napisani za korištenje komponente.
Abstract (english)
In this project, a Universal Verification Component (UVC) was developed in order to functionally verify SPI protocol. It is based on Universal Verification Methodology (UVM), which is a de-facto standard in constrained-random metric-driven verification of digital logic in the industry today. To speed up the process of developing the UVC, UVM Framework was used. It contains a class library that extends UVM base class library, and provides scripts for code generation, documentation and examples. Script inputs, such as UVM component details, were written in YAML (YAML Ain't Markup Language). YAML provides high-level of abstraction inputs, and thus is less error prone method of connecting the UVM components. Verification plan was to compare inputs and outputs of the DUT, and if they matched, SPI functionality would be verified. UVC was made to be able to support all SPI modes, as well as multiple parameters, such as frame length and number of transactions. The developed UVC contains both SPI primary and secondary. Finally, tests were written to run the UVC.
Keywords
Keywords (english)
Languageenglish
URN:NBNurn:nbn:hr:168:607636
Study programmeTitle: Electrical Engineering and Information Technology
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
Type of resourceText
File originBorn digital
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Created on2023-01-13 12:53:04