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scientific master's theses
Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2010. urn:nbn:hr:168:029730
Vujović, Branislav
University of Zagreb
Faculty of Electrical Engineering and Computing
Department of Control and Computer Engineering

Institutional repository: FER Repository

Cite this document

Vujović, B. (2010). Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora (Scientific master's theses). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:029730

Vujović, Branislav. "Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2010. https://urn.nsk.hr/urn:nbn:hr:168:029730

Vujović, Branislav. "Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora." Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, 2010. https://urn.nsk.hr/urn:nbn:hr:168:029730

Vujović, B. (2010). 'Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora', Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 26 December 2024, https://urn.nsk.hr/urn:nbn:hr:168:029730

Vujović B. Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora [Scientific master's theses]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2010 [cited 2024 December 26] Available at: https://urn.nsk.hr/urn:nbn:hr:168:029730

B. Vujović, "Modeliranje i simuliranje arhitekture dinamički promjenjivog procesora", Scientific master's theses, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2010. Available at: https://urn.nsk.hr/urn:nbn:hr:168:029730

Metadata
TitleModeliranje i simuliranje arhitekture dinamički promjenjivog procesora
Title (english)Modelling and simulation of reconfigurable processor architecture
AuthorBranislav Vujović
MentorDanko Basch (mentor)
Committee memberMario Kovač (predsjednik povjerenstva)
Committee memberDanko Basch (član povjerenstva)
Committee memberDavor Antonić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
(Department of Control and Computer Engineering)
Zagreb
Defense date and country2010-12-02, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Universal decimal classification
(UDC)		004 - Computer science and technology. Computing. Data processing
Abstract
U ovom radu dan je prijedlog poboljšanja postojeće arhitekture dinamički promjenjivog procesora optimiziranog za brzo izvođenje raznih algoritama nad velikim skupovima podataka. Analizirano je ponašanje polazne arhitekture te su predložene prikladne izmjene. Prikazan je opis mogućnosti pojedinih komponenti kao i njihovo ponašanje tijekom izvođenja programa. Također je predložen postupak modeliranja i simuliranja arhitekture dinamički promjenjivog procesora. Predloženi postupak omogućuje promjene u arhitekturi i proširivanje simulatora s drugim alatima kao npr. podrškom za ispravljanje grešaka. Razvojna okolina objedinjuje uređivač teksta, asemblerski prevodioc i podršku za otkrivanje pogrešaka.
Abstract (english)
In this thesis, a proposal was given to improve the existing architecture of a dynamic variable processor optimized for fast execution of various algorithms over large data sets. Analyzed behavior of the initial architecture has resulted with appropriate changes. Thesis gives description of the capabilities of individual components and their behavior during program execution. Suggested modeling and simulation techniques ensure various reconfigurable processor architectures. The proposed procedure allows changes to the architecture and extension of the simulator with other tools such as support for debugging. Development environment combines a text editor, assembler compiler and support for debugging.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:029730
Promotion2020
ProjectNumber: 036-0361959-1979
Title: Oblikovanje i implementacija programskih jezika specijalne namjene
Leader: Danko Basch
Jurisdiction: Croatia
Funder: MZOS
Funding stream: ZP
Study programmeTitle: Postgraduate master programe in computing
Study programme type: university
Study level: postgraduate
Academic / professional title: magistar inženjer računarstva (magistar inženjer računarstva)
Catalog URLhttp://lib.fer.hr/cgi-bin/koha/opac-detail.pl?biblionumber=34329
Type of resourceText
Extent99 str ; 30 cm
File originBorn digital
Access conditionsClosed access
Terms of useLicence In copyright icon
Created on2020-08-19 07:55:51