prikaz prve stranice dokumenta Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V
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master's thesis
Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. urn:nbn:hr:168:952803
Brmbota, Dorian
University of Zagreb
Faculty of Electrical Engineering and Computing

Institutional repository: FER Repository

Cite this document

Brmbota, D. (2020). Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:952803

Brmbota, Dorian. "Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:952803

Brmbota, Dorian. "Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:952803

Brmbota, D. (2020). 'Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 28 December 2024, https://urn.nsk.hr/urn:nbn:hr:168:952803

Brmbota D. Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2020 [cited 2024 December 28] Available at: https://urn.nsk.hr/urn:nbn:hr:168:952803

D. Brmbota, "Integracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2020. Available at: https://urn.nsk.hr/urn:nbn:hr:168:952803

Metadata
TitleIntegracija akceleratora za duboko učenje u heterogeni računalni sustav zasnovan na procesoru arhitekture RISC-V
Title (english)Deep Learning Accelerator Integration in Heterogeneous Computing RISC-V System
AuthorDorian Brmbota
MentorJosip Knezović (mentor)
Committee memberJosip Knezović (predsjednik povjerenstva)
Committee memberHrvoje Mlinarić (član povjerenstva)
Committee memberDaniel Hofman (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2020-07-17, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
Veliki dio IT industrije je posvećen istraživanju algoritama dubokog učenja. Računalno su složeni i zahtjevaju veliku količinu memorijskih resursa. Dok se treniranje dubokih neurnoskih mreža izvodi na snažnim radnim stanicama, samo zaključivanje modela se često vrši na ugradbenim, energetski učinkovitim uređajima. NVIDIA Deep Learning Accelerator(NVDLA) je podesiv akceleratora otvorenog koda, idealan za integraciju u ugradbena, energetski učinkvita, system-on-chip(SoC) računala. Ovaj rad se bavi integracijom NVDLA u PULPissimo - sustav baziran na RISC-V.
Abstract (english)
Great part of IT industry is dedicated to researching Deep Learning algorithms. They are computationally intensive and requires large amount of memory. While training of Deep Neural Networks can be done on powerful workstations, the inference often needs to be done on some embedded, low-power devices. NVIDIA Deep Learning Accelerator(NVDLA) is an open source, low power, configurable accelerator that can be integrated into embedded system-on-chip(SoC) devices. This thesis describes integration of NVDLA into PULPissimo - a RISC-V architecture based system.
Keywords
Keywords (english)
Languageenglish
URN:NBNurn:nbn:hr:168:952803
Study programmeTitle: Computing
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
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Created on2023-01-13 11:53:58